As carrier networks evolve, revenues generated by time-sensitive services such as voice, video and cellular applications are being increasingly entrusted to a packet-switched infrastructure. According to company research, global cellular service revenues are set to reach US$570 billion this year alone.

"Strict service level agreements, coupled with customer demand for highly reliable service and lower costs, mean carriers must ensure circuit-switched performance over an economic packet infrastructure," said Jeremy Lewis, product line marketing manager, Zarlink Semiconductor. "Our ToP technology is the first to use the packet network itself to transport synchronization, allowing operators to migrate to a converged network while supporting carrier-class services."

Major manufacturers are already designing Zarlink's ToP technology into applications including xPON (passive optical networks), broadband-DLC (digital loop carriers) and wireless infrastructure equipment. Wireless service providers can save millions of dollars in operating costs by moving to a packet backhaul infrastructure. Zarlink's ToP technology is a corner stone of this migration process.

As network architectures become more complex, there are increasing requirements for network processors to handle a growing volume of varied traffic types. Zarlink has been working closely with Wintegra(TM), a leader in network processing, and their comprehensive range of WinPath access packet processors. Combining Zarlink's ToP technology and the flexibility of the WinPath solution, customers can confidently design packet-based equipment to meet circuit-switched performance needs.

Meeting wireless network timing challenges

Traditionally, wireless network synchronization between base station controllers and base stations relied on a T1/E1 synchronization and a standard PLL (phase-locked loop). As wireless operators move to a packet backhaul approach, synchronization will be achieved using alternative mechanisms.

One method has been to deploy GPS (global positioning system) receivers and oscillators to synchronize network traffic. However, this approach adds significant capital and operating expense costs. By employing Zarlink ToP technology, wireless operators can eliminate T1/E1 interfaces while at the same time achieving better than the G.823/G.824 standard for MTIE (maximum time interval error) and frequency accuracy.

ToP technology is built on a field-proven processing engine developed for Zarlink's CESoP (Circuit Emulation Services over Packet) family of devices and its leading expertise in clock recovery for circuit emulation applications. The ToP technology encodes a PRS (primary reference source) clock at the "master" node and subsequently transmits this clock over the packet network within a specific packet connection. The "client" node then recovers the clock through the use of complex algorithms employing a number of field-proven techniques.

For wireless infrastructure applications, the ZL30302 chip acts as the master and distributes the PRS from the RNC (radio network controller) to the Node B over an Ethernet network. At the Node B, the ZL30301 device acts as the client, extracting timing from the packet network and creating an output clock traceable to the PRS. Redundancy is also achieved, with the ZL30301 chip recovering up to four separate PRS clocks and selecting one for use within the client node.

Both ToP devices support differential clock recovery, a mechanism used when the same PRS is available at both the master and client nodes, for example through a SONET infrastructure. The devices also support adaptive clock recovery, which is commonly used at the edge of the network where a PRS is usually available only at the master node.

Performance during network disturbances

Equipment manufacturers and carriers have tested Zarlink's ToP technology over a variety of networks to ensure dependable performance in the presence of PDV (packet delay variation), routing changes, network overload and even network outages.

The ZL30301 and ZL30302 devices maintain an average frequency accuracy of less than +/- 15 ppb (parts per billion) with a Stratum 3 quality TCXO (temperature controlled crystal oscillator). Manufacturers are also using the PDH (plesiochronous digital hierarchy) G.823 and G.824 Traffic & Synchronization Interface standards as guidelines for packet network timing performance. In the event of network failure or severe network congestion, the devices will put recovered clocks into holdover until the flow of timing packets is restored.

Zarlink and industry standards

Zarlink is actively participating in enhancing the IEEE1588(TM) (Institute of Electrical & Electronic Engineers), the standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems. This protocol is used in the distribution of clocks over packet switched networks. Zarlink is also involved with the ITU (International Telecommunication Union) Study Group 15 Question 13 for the development of G.pactiming - Timing and Synchronization Aspects of Packet Networks.

Request ToP technology information

Zarlink's ZL30301 and ZL30302 ToP devices are available only to qualified customers. To learn how to become a qualified customer and for more information on Zarlink's ToP technology, including datasheets, application notes, evaluation boards and pricing details, and to discuss your requirements please send an email to Email Contact . Alternatively, please contact your local sales representative.

About Zarlink Semiconductor

For over 30 years, Zarlink Semiconductor has delivered semiconductor solutions that drive the capabilities of voice, enterprise, broadband and wireless communications. The Company's success is built on its technology strengths including voice and data networks, consumer and ultra low-power communications, and high-performance analog. For more information, visit www.zarlink.com .

Shareholders and other individuals wishing to receive, free of charge, copies of the reports filed with the U.S. Securities and Exchange Commission and Regulatory Authorities, should visit the Company's web site at www.zarlink.com or contact investor relations.

Certain statements in this press release constitute forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995. Such forward-looking statements involve known and unknown risks, uncertainties, and other factors which may cause the actual results, performance or achievements of the Company to be materially different from any future results, performance, or achievements expressed or implied by such forward-looking statements. Such risks, uncertainties and assumptions include, among others, the following: rapid technological developments and changes; our dependence on our foundry suppliers and third-party subcontractors; increasing price and product competition; our ability to achieve profitability in the future; our exposure to currency exchange rate fluctuations and other factors inherent in our international operations; and other factors referenced in our Annual Report on Form 20-F for the fiscal year ended March 25, 2005. Investors are encouraged to consider the risks detailed in this filing.

Zarlink, ZL, and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

CONTACT: Zarlink: Ed Goffin, Media Relations, (613) 270-7112,
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